MMRFIC Technology, IIT-M to Develop RISC-V Based Secure SoC for Govt of India

CIOTechOutlook Team | Wednesday, 02 April 2025, 20:15 IST

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For the purpose of designing and developing RISC-V based Secure SoC for a Strategic venture for Government of India, MMRFIC Technology, a subsidiary of Sansera Engineering, announced a significant partnership by signing a Memorandum of Understanding (MoU) with Indian Institute of Technology Madras (IITM) to design and develop RISC-V based Secure SoC for a Strategic venture for Government of India.

RISC-V, which is pronounced risk-five, is an intellectual property at no cost and can be freely designed for its open Instruction Set Architecture (ISA) to initiate the next generation of processor innovation through open community collaboration. SHAKTI (the open-sourced project run by the RISE group at IITM) is a project to create production-grade processors, stand-alone on-chip System on Chip (SoCs), development boards and SHAKTI based software platforms

This is a 5-year MOU which allows each party to use each other’s Engineering mass resources and electronic design automation tools that are required as a collaborative design responsibility of IITM and MMRFIC.

MMRFIC possesses the necessary capabilities, expertise, and experience, and shall be responsible for the following in this development: The Secure SoC will be built and tested with both the hardware/software elements provided by IITM, and the cryptographic accelerators developed locally by MMRFIC.


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